Events and Courses Listing

Efficient Development for Robust Systems Using Virtual Prototypes and Multi-Level Processors Models - 2 PDUs for PEB PEs & IES C.Engs (Approved/ Confirmed).

Date(s):
18th Jan 2018
Time:
4:00PM - 6:00PM -
Venue:
Singapore Institute of Technology@Singapore Polytechnic (SIT@SP)
510 Dover Road Singapore 139660
LT6D (6th floor, accessible via lift), SIT@SP
https://goo.gl/maps/eXvszpJNpCK2
Costs:
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CPD:
PDU (PEB) 2
PDU (CEng) 2
Description:

Please click HERE for the Flyer/ Programme. 

Alternate Online Registration Site for IES Members, IES Student Members, SIT Members, SSIA Members, SPETA Members, Co-Organisers, Supporting Organisations and Partners' Members, Staff and/ or Officers and Non-Members, please click HERE to register.

Course Coordinator: Mr. Colin Fong, (e) colin.fong@iesnet.org.sg (d) 6461 1236

CPD/ PDU: 2 (two) PDUs for PEB PEs and IES CEngs (Approved/ Confirmed for all engineering branches/ disciplines and/ or engineering branches/ disciplines listed in http://charteredengineers.sg/branches/).  (Accreditation of CPD PDU for IES Chartered Engineer (C.Eng)/ Attendee will be duly accredited/ awarded correspondingly/ similarly to those approved/ confirmed by PEB.)

IES Electrical, Electronics and Computer Engineering Technical Committee (EECETC) and Singapore Institute of Technology (SIT) proudly present: "Efficient Development for Robust Systems Using Virtual Prototypes and Multi-Level Processors Models".

The Organising Committee is honoured, delighted and pleased to have Professor Dr.-Ing. Ulf Schlichtmann as our Esteemed Speaker.

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Ref: IES-P0000006-3
 
 

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